In this thesis work, a new technique for designing logic circuits called the Modified Gate Diffusion Input (MGDI) logic is discussed. This logic is adopted from the Gate Diffusion Input (GDI) technique. GDI was first proposed in the year 2002 for solving the problems associated with different CMOS logic styles. GDI cell can be used to implement wide variety of complex logic functions using only two transistors. GDI technique allows design of high speed and low power circuits with reduced number of transistors as compared to static CMOS and Pass Transistor Logic (PTL) techniques. This work aims to design a various high performance adders and multipliers.
This book introduces a Gate Diffusion Input (GDI) methodology as an alternative approach in digital circuits. In this technique, a wide range of complex logic functions can be realized by using a lower number of CMOS transistors. The advantages of using GDI technique are multi-folded. The first is to implement digital gates (i.e. inverters, NAND, NOR, XOR, XNOR, buffers, etc.) with very low propagation delay and high logic level swing. As a second advantage, the GDI-based circuits consume lower power consumption and chip area compared with the CMOS equivalent. This provides a new implementation of digital circuits which are suitable for longer-lasting portable devices, like smartphones, tablets, IoT, etc.. A third advantage is the simplicity of circuit design by using very small cell library. In this book, after a brief review of GDI specifications, we will discuss different architectures of GDI-based digital circuits that have been recently proposed.